# File timestamp (UTC): 2021-03-21T12:20:35.698 # NIST Circuit Complexity Project # https://csrc.nist.gov/projects/circuit-complexity begin circuit WhirlwindM0--XOR=183--XLZBZ20 # SLP Source: https://doi.org/10.13154/tosc.v2020.i2.120-145 --- https://github.com/xiangzejun/Optimizing_Implementations_of_Linear_Layers # The preamble, metadata, SLP syntax and variable names have been adjusted here to the NIST format # Boolean Circuit for a linear system y = A.x defined by a 32x32 bit-matrix A # Matrix A weights (W): totalW=520, adjW=488, minWInRow=14, maxWInRow=19, minWInCol=19, maxWICol=14 # Matrix represented as 32 rows: vecRows=UInt32[0x38d26a45, 0x6394c78a, 0xc618be37, 0xbc235f6e, 0x832da654, 0x36497ca8, 0x6c81eb73, 0xcb32f5e6, 0xd238456a, 0x94638ac7, 0x18c637be, 0x23bc6e5f, 0x2d8354a6, 0x4936a87c, 0x816c73eb, 0x32cbe6f5, 0x6a4538d2, 0xc78a6394, 0xbe37c618, 0x5f6ebc23, 0xa654832d, 0x7ca83649, 0xeb736c81, 0xf5e6cb32, 0x456ad238, 0x8ac79463, 0x37be18c6, 0x6e5f23bc, 0x54a62d83, 0xa87c4936, 0x73eb816c, 0xe6f532cb] # Matrix represented as 32 columns: vecCols=UInt32[0x9278ca45, 0xb6895fce, 0x6c12be9d, 0xc9346d2a, 0x2987ac54, 0x6b98f5ec, 0xc621ebd9, 0x9c43d6a2, 0x789245ca, 0x89b6ce5f, 0x126c9dbe, 0x34c92a6d, 0x872954ac, 0x986becf5, 0x21c6d9eb, 0x439ca2d6, 0xca459278, 0x5fceb689, 0xbe9d6c12, 0x6d2ac934, 0xac542987, 0xf5ec6b98, 0xebd9c621, 0xd6a29c43, 0x45ca7892, 0xce5f89b6, 0x9dbe126c, 0x2a6d34c9, 0x54ac8729, 0xecf5986b, 0xd9eb21c6, 0xa2d6439c] # The element in the i-th row and j-th col of A is A[i,j] = 1 & (vecRows[i]>>(j-1)) = 1 & (vecCols[j]>>(i-1)) # Tally: 32 inputs, 32 outputs, 183 gates (183 XOR) # Circuit depth: 14 Inputs: x1:x32 Outputs: y1:y32 Internal: t1:t151 GateSyntax: GateName Output Inputs # Regex to obtain gate (\1), output var (\2) and input vars (\3, \4): (XOR)\s([ty]\d+)\s([tyx]\d+)\s([tyx]\d+).*$ begin SLP XOR t1 x21 x28 XOR t2 x9 x8 XOR t3 x7 x4 XOR t4 x22 t2 XOR t5 x8 x11 XOR t6 x5 x14 XOR t7 x29 x27 XOR t8 t1 t6 XOR t9 x20 x30 XOR t10 t7 x24 XOR t11 x23 t8 XOR t12 x15 x18 XOR t13 t2 x3 XOR t14 x24 x32 XOR t15 x14 t11 XOR t16 x4 x26 XOR t17 x1 x16 XOR t18 x18 x26 XOR t19 t11 t14 XOR t20 t16 x31 XOR t21 t4 x10 XOR t22 x10 t8 XOR t23 x30 t13 XOR t24 t13 x13 XOR t25 x13 t9 XOR t26 t9 t10 XOR t27 t23 x12 XOR t28 t5 x6 XOR t29 x6 x32 XOR t30 x3 t29 XOR t31 t29 x31 XOR t32 x31 t21 XOR t33 t31 t10 XOR t34 t10 t21 XOR t35 t14 t12 XOR t36 t21 x11 XOR t37 t32 t12 XOR t38 t12 t8 XOR t39 x16 t15 XOR t40 t35 x11 XOR t41 t34 t19 XOR t42 t36 t15 XOR t43 t15 t8 XOR t44 t8 t25 XOR t45 t43 x27 XOR t46 x11 t38 XOR t47 t38 x28 XOR t48 x28 t25 XOR t49 t25 t19 XOR t50 t19 x25 XOR t51 t44 x25 XOR t52 x25 t18 XOR t53 x27 x2 XOR t54 x2 t18 XOR t55 t18 t3 XOR t56 t50 t3 XOR t57 t33 t27 XOR t58 t42 t20 XOR t59 t20 t27 XOR t60 t27 t53 XOR t61 t53 t3 XOR t62 t3 t22 XOR t63 t22 x26 XOR t64 x26 t30 XOR t65 t54 x32 XOR t66 t56 t28 XOR t67 t64 t28 XOR t68 t28 x17 XOR t69 t63 t48 XOR t70 t48 x32 XOR t71 t46 x17 XOR t72 t30 t24 XOR t73 t40 t62 XOR t74 t51 t68 XOR t75 t68 t62 XOR t76 t61 x17 XOR t77 t72 x12 XOR t78 t62 x19 XOR t79 t37 t6 XOR t80 t60 t6 XOR t81 x32 t17 XOR t82 t70 t26 XOR t83 t65 x12 XOR t84 t74 x12 XOR t85 t39 x19 XOR t86 t84 t17 XOR t87 t83 t26 XOR t88 t49 x19 XOR t89 t76 t26 XOR t90 t80 t85 XOR t91 x17 t85 XOR t92 t45 t89 XOR t93 t52 t78 XOR t94 x12 t79 XOR t95 t94 t89 XOR t96 t57 t89 XOR t97 t69 t96 XOR t98 t78 t24 XOR t99 t85 t55 XOR t100 t93 t95 XOR t101 t95 t73 XOR y26 t99 t96 XOR t102 t24 t6 XOR t103 t73 t66 XOR t104 t6 t87 XOR t105 t55 t75 XOR t106 t59 t77 XOR t107 t101 t91 XOR t108 t77 t26 XOR t109 t26 t58 XOR t110 t109 x19 XOR t111 x19 t87 XOR t112 t87 t89 XOR t113 t112 t17 XOR t114 t17 t88 XOR t115 t114 t41 XOR t116 t41 t86 XOR t117 t116 t71 XOR t118 t115 t67 XOR t119 t67 t79 XOR t120 t86 t102 XOR t121 t103 t110 XOR t122 t110 t47 XOR t123 t117 t98 XOR t124 t82 t98 XOR y4 t104 t121 XOR t125 t121 t75 XOR t126 t89 t118 XOR t127 t122 t90 XOR t128 t102 t96 XOR t129 t96 t111 XOR y7 t79 t113 XOR t130 t129 t92 XOR t131 t92 t75 XOR t132 t113 t75 XOR y3 t132 t106 XOR t133 t75 t71 XOR t134 t128 t71 XOR t135 t133 t66 XOR y19 t71 t111 XOR t136 t111 t100 XOR t137 t100 t97 XOR y27 t137 t47 XOR y17 t97 t90 XOR t138 t47 t88 XOR t139 t138 t91 XOR y21 t90 t81 XOR t140 t81 t98 XOR t141 t140 t91 XOR t142 t91 t118 XOR y29 t118 t106 XOR y28 t142 t124 XOR t143 t124 t88 XOR t144 t88 t58 XOR t145 t58 t106 XOR t146 t125 t145 XOR y10 t123 t131 XOR y2 t98 y19 XOR t147 t135 y21 XOR t148 t130 t144 XOR t149 t148 t127 XOR y11 t106 t107 XOR y32 t127 t107 XOR t150 t144 t134 XOR y5 t149 t146 XOR y25 t66 t134 XOR y9 t134 t108 XOR y8 t139 t131 XOR y12 t108 t141 XOR y23 t147 y26 XOR t151 t119 y3 XOR y16 t146 y8 XOR y13 t120 t151 XOR y1 t143 t151 XOR y24 t151 y9 XOR y31 t107 y5 XOR y15 t145 y10 XOR y6 t141 y23 XOR y22 t131 y4 XOR y20 t150 y16 XOR y30 t136 y15 XOR y18 t126 y31 XOR y14 t105 y1 end SLP end circuit