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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Junos OS 18.1R1 QuickSec
Description
The SRX4600 is a high-performance, next-generation firewall supporting cloud-enabled enterprise data center, campus or service provider networks. It offers high-scale security services while providing scalability, ease of management, secure connectivity, and advanced threat mitigation capabilities.
Version
Junos OS 18.1R1 (Firmware)
Type
SOFTWARE
Vendor
Juniper Networks, Inc.
1133 Innovation Way
Sunnyvale, CA 94089
USA
Contacts
Bill Shelton
bshelton@juniper.net
408-745-2000
Fax: 408-745-2001
Vann (Vanna) Nguyen
vann@juniper.net
408-745-2000
Fax: 408-745-2001

AES 5455

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 AES-CBC Expand
Intel(R) Xeon(R) CPU E5 AES-GCM Expand

HMAC 3613

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 HMAC-SHA-1 Expand
Intel(R) Xeon(R) CPU E5 HMAC-SHA2-256 Expand
Intel(R) Xeon(R) CPU E5 HMAC-SHA2-384 Expand

TDES 2743

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 TDES-CBC Expand

ECDSA 1456

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 ECDSA KeyGen (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E5 ECDSA SigGen (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E5 ECDSA SigVer (FIPS186-4) Expand

RSA 2929

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 RSA SigGen (FIPS186-2) Expand
Intel(R) Xeon(R) CPU E5 RSA SigGen (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E5 RSA SigVer (FIPS186-4) Expand

DRBG 2139

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 HMAC DRBG Expand

Component 1903

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 KDF IKEv1 Expand
Intel(R) Xeon(R) CPU E5 KDF IKEv2 Expand

SHS 4376

   First Validated: 5/25/2018
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E5 SHA-1 Expand
Intel(R) Xeon(R) CPU E5 SHA2-256 Expand
Intel(R) Xeon(R) CPU E5 SHA2-384 Expand

Created October 05, 2016, Updated March 16, 2023