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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
The FiberLogic Cryptographic Core (Firmware implemented by FPGA) provides cryptographic functionality for secure network traffic.
Version
1.0001 (Firmware)
Type
SOFTWARE
Vendor
Fiber Logic Communications, Inc.
5F-3, No.9 Prosperity Road One, Science-Park
Hsinchu City 408
TAIWAN
Contacts
Jun Tseng
jun@fiberlogic.com
03-5638889#217
Fax: 03-5638899

AES 1903

   First Validated: 12/16/2011
Operating Environment Algorithm Capabilities
Xilinx Isim Simulator AES-CBC Expand
Xilinx Isim Simulator AES-CCM Expand
Xilinx Isim Simulator AES-CFB128 Expand
Xilinx Isim Simulator AES-CTR Expand
Xilinx Isim Simulator AES-ECB Expand
Xilinx Isim Simulator AES-OFB Expand

Created October 05, 2016, Updated March 16, 2023