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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
An FPGA implementation of the AES algorithm.
Version
1.0 (Firmware)
Type
SOFTWARE
Vendor
AJA Video Systems, Inc.
443 Crown Point Circle
Grass Valley, CA 95945
USA
Contacts
Andy Witek
andyw@aja.com
530-271-3176
Fax: 530-274-9442

AES 812

   First Validated: 7/3/2008
Operating Environment Algorithm Capabilities
Xilinx FPGA AES-CBC Expand
Xilinx FPGA AES-ECB Expand

Created October 05, 2016, Updated March 16, 2023