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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
hana_bcm_microcode_production
Description
The HANA3 ASIC is a SAS-based, three-lifecycle, rotating media controller, the security portion of which containing HASH, AES, Entropy and Modular Arithmetic (ZMODP) hardware accelerators, along with DRBG and RSA hybrid (hardware/firmware) services. The DRBG is compliant with ANSI 9.31. RSA is compliant with PKCS #11.
Version
88i1248 3.00.02 (Firmware)
Type
FIRMWARE
Vendor
Marvell Semiconductor, Inc.
5488 Marvell Lane
Santa Clara, CA 95054
USA
Contacts
Len Galasso
408-222-5000
Lei Poo
408-222-5000

RNG 951

   First Validated: 9/22/2011
Operating Environment Algorithm Capabilities
88i1248 RNG ANSI X9.31: Expand

Created October 05, 2016, Updated March 07, 2024