Module Name
Security Builder® FIPS Module
Caveat
When operated in FIPS mode
Security Level Exceptions
Embodiment
Multi-Chip Stand Alone
Description
SB FIPS Module is a cryptographic toolkit for C language users, providing services of various cryptographic algorithms such as hash algorithms, encryption schemes, message authentication, and public key cryptography.
Tested Configuration(s)
- Android 9 running on a Google Pixel 3 smart phone with a Qualcomm Snapdragon 845 64-bit ARMv8 processor with PAA
- Android 9 running on a Google Pixel 3 smart phone with a Qualcomm Snapdragon 845 64-bit ARMv8 processor with PAA (32-bit ARMv7 instructions)
- Android 9 running on a Google Pixel 3 smart phone with a Qualcomm Snapdragon 845 64-bit ARMv8 processor without PAA
- Android 9 running on a Google Pixel 3 smart phone with a Qualcomm Snapdragon 845 64-bit ARMv8 processor without PAA (32-bit ARMv7 instructions)
- CentOS 7.0 on VMware ESX 6 running on a Lenovo SR630 with an Intel Xeon Silver 64-bit x86 processor with PAA
- CentOS 7.0 on VMware ESX 6 running on a Lenovo SR630 with an Intel Xeon Silver 64-bit x86 processor without PAA
- iOS 12.4.7 running on an Apple iPad mini 2 with an Apple A7 64-bit ARMv8 processor with PAA
- iOS 12.4.7 running on an Apple iPad mini 2 with an Apple A7 64-bit ARMv8 processor without PAA
- Mac OS 10.15 running on an Apple Mac Book Pro late 2012 laptop computer with an Intel Core i7 64-bit x86 processor with PAA
- Mac OS 10.15 running on an Apple Mac Book Pro late 2012 laptop computer with an Intel Core i7 64-bit x86 processor without PAA
- QNX SDP 7.1 running on a Supermicro A2SDi-4C-HLN4F-O server motherboard with an Intel Atom 64-bit x86 processor with PAA
- QNX SDP 7.1 running on a Supermicro A2SDi-4C-HLN4F-O server motherboard with an Intel Atom 64-bit x86 processor without PAA (single-user mode)
- QNX SDP 7.1 running on a Xilinx Zynq UltraScale+ MPSoC ZCU102 Eval. Kit with a CortexA53 64-bit ARMv8 processor with PAA
- QNX SDP 7.1 running on a Xilinx Zynq UltraScale+ MPSoC ZCU102 Eval. Kit with a CortexA53 64-bit ARMv8 processor without PAA
- QNX SDP 7.1 running on an NXP i.MX8 QuadXPlus Multisensory Enablement Kit with a Cortex-A35 ARMv8 processor with PAA
- QNX SDP 7.1 running on an NXP i.MX8 QuadXPlus Multisensory Enablement Kit with a Cortex-A35 ARMv8 processor without PAA
- Ubuntu Linux 18.04 on VMware ESX 6 running on a Lenovo SR630 with an Intel Xeon Silver 64-bit x86 processor with PAA
- Ubuntu Linux 18.04 on VMware ESX 6 running on a Lenovo SR630 with an Intel Xeon Silver 64-bit x86 processor without PAA
- Windows 10 Pro on a Lenovo P15 laptop computer with an Intel Core i7 64-bit x86 processor with PAA
- Windows 10 Pro on a Lenovo P15 laptop computer with an Intel Core i7 64-bit x86 processor without PAA
- Windows Server 2019 on VMware ESX 6 running on a Lenovo SR630 with an Intel Xeon Silver 64-bit x86 processor with PAA
- Windows Server 2019 on VMware ESX 6 running on a Lenovo SR630 with an Intel Xeon Silver 64-bit x86 processor without PAA
Approved Algorithms
| AES |
Cert. #A1303 |
| CKG |
vendor affirmed |
| CVL |
Cert. #A1303 |
| DRBG |
Cert. #A1303 |
| DSA |
Cert. #A1303 |
| ECDSA |
Cert. #A1303 |
| ENT |
NP |
| HMAC |
Cert. #A1303 |
| KAS-SSC |
Cert. #A1303 |
| KDA |
Cert. #A1303 |
| KTS |
AES Cert. #A1303; key establishment methodology provides between 128 and 256 bits of encryption strength |
| KTS-RSA |
Cert. #A1303; key establishment methodology provides between 112 and 150 bits of encryption strength |
| RSA |
Cert. #A1303 |
| SHA-3 |
Certs. #A1302 and #A1303 |
| SHS |
Cert. #A1303 |
| Triple-DES |
Cert. #A1303 |
