Cryptographic Algorithm Validation Program CAVP

Product Name
Description
NITROX III chips implement SHA1/SHA2, 3DES/AES256 CBC, ModMul/ModEx/RSA, GCM and CTR modes, and SP800-90A DRBG. Perf: 5 to 30 Gbps encrypt/hash; 35K to 200K RSA 1024b ops/sec; 6K to 35K RSA 2048b ops/sec. NITROX III microcode also implements protocol-specific acceleration for IPSec and SSL.
Version
Nitrox III series die, v1.1 Nitrox III GCM, r72406 (Firmware)
Type
FIRMWARE
Vendor
Cavium, Inc.
2315 N. First Street
San Jose, CA 95131
USA
Contacts
Mike Scruggs
mike.scruggs@cavium.com
(408) 943-7100
(408) 577-1992
TA (TAR) Ramanujam
tar@cavium.com
(408) 943-7383
(408) 577-1992

Validations

Number
Date
Operating Environments
Algorithm Capabilities
AES 2035
5/25/2012
  • Cavium Nitrox III
    • Cavium Nitrox III
  • AES-GCM
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 192, 256
    • Tag Length: 128
    • IV Length: 96
    • Payload Length: 1024
    • AAD Length: 1024
    Prerequisites:
Created October 05, 2016, Updated June 22, 2020