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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
Firmware (VHDL) implementation of AES using 256-bit key size with 3 different CTR modes: DVB-S2 Rx, LW Reference Burst Tx/Rx and LW TDMA Burst Tx/Rx
Version
AES_CTR_LWCBM-1.5.0
Type
FIRMWARE
Vendor
ViaSat, Inc.
6155 El Camino Real
Carlsbad, CA 92009
USA
Contacts
Kyle Dormody
Kyle.Dormody@viasat.com
760-893-4127
Alec Kosky
Alec.Kosky@viasat.com
760-476-2238

A2332

   First Validated: 2/14/2022
Operating Environment Algorithm Capabilities
Simulator: Cadence NC-Verilog Expand
    AES-CTR Expand
    Xilinx Spartan III FPGA Expand
      AES-ECB Expand

      Created October 05, 2016, Updated August 08, 2024