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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
RSA Module implements Signature Verification per PSS PKCS#1 V2.1 with 2048 bit Modulus and fixed and variable exponent. PBKDF Module implements support for variable length password up to 32 bytes, salt of 32 bytes generating output of 32 bytes. DRBG Module implements the CTR-DRBG as per the SP 800-90A specification.
Version
1.0
Type
FIRMWARE
Vendor
SK hynix memory solutions America Inc.
3103 North First Street
San Jose, California 95134
USA

Contacts
Dharma Nagarajan
dharma.nagarajan@skhms.com
(408) 514-3675
Fax: 408-514-3501
Chandra Chebrolu
chandra.chebrolu@skhms.com
(408) 514-3710
Fax: 408-514-3501

A912

   First Validated: 12/17/2020
Operating Environment Algorithm Capabilities
ARM Cortex-R8 without Neon Expand
    Counter DRBG Expand
    ARM Cortex-R8 without Neon Expand
      PBKDF Expand
      ARM Cortex-R8 without Neon Expand
        RSA SigVer (FIPS186-4) Expand

        Created October 05, 2016, Updated March 16, 2023