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Cryptographic Algorithm Validation Program CAVP

Implementation Name
NITROX III chips implement SHA1/SHA2, 3DES/AES256 CBC, ModMul/ModEx/RSA, GCM and CTR modes, and SP800-90A DRBG. Perf: 5 to 30 Gbps encrypt/hash; 35K to 200K RSA 1024b ops/sec; 6K to 35K RSA 2048b ops/sec. NITROX III microcode also implements protocol-specific acceleration for IPSec and SSL.
Nitrox III Series Die 1.1 Nitrox III TLS KDF, 89547 (Firmware)
Cavium, Inc.
2315 N. First Street
San Jose, CA 95131
Tasha Castañeda
408 943-7380

Component 167

   First Validated: 12/13/2013
Operating Environment Algorithm Capabilities
Cavium Nitrox III Series KDF TLS Expand

Created October 05, 2016, Updated March 16, 2023