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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
FPGA core. AES-XTS 256 bit Key, 128 bit multiple length text. Associated GMAC, 256 bit key, 128 bit multiple text length.
Version
XTS_GMAC_1.0 (Firmware)
Type
SOFTWARE
Vendor
Altera Canada
58 Glencoe Drive
Mount Pearl, Newfoundland A1N 4S9
Canada
Contacts
Diane Corrigan
dcorriga@altera.com
709.747.4387
Shawn Nicholl
snicholl@altera.com
709.747.4125

AES 2369

   First Validated: 4/5/2013
Operating Environment Algorithm Capabilities
Modelsim Altera 10.1b (simulator) AES-GMAC Expand
Modelsim Altera 10.1b (simulator) AES-XTS Expand

Created October 05, 2016, Updated March 08, 2021