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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Microsemi SoC Cryptographic Module Mark II
Description
The Microsemi SoC Cryptographic Module provides custom hardware/firmware acceleration of the standard cryptographic algorithms used in Microsemi FPGAs and SoC FPGAs like Igloo®2 and SmartFusion®2. They are used to securely configure the devices, and are also made available to the FPGA user via an internal bus interface for use in end applications.
Version
1.1 (Firmware)
Type
SOFTWARE
Vendor
Microsemi Corporation
One Enterprise
Aliso Viejo, CA 92656
USA
Contacts
Richard Newell
+1 (408) 643-6146

Component 335

   First Validated: 8/11/2014
Operating Environment Algorithm Capabilities
Mentor Graphics Questa Simulator 10.1c KAS-ECC CDH-Component Expand

HMAC 1860

   First Validated: 8/11/2014
Operating Environment Algorithm Capabilities
Mentor Graphics Questa Simulator 10.1c HMAC-SHA2-256 Expand

SHS 2472

   First Validated: 8/11/2014
Operating Environment Algorithm Capabilities
Mentor Graphics Questa Simulator 10.1c SHA2-256 Expand

DRBG 542

   First Validated: 8/11/2014
Operating Environment Algorithm Capabilities
Mentor Graphics Questa Simulator 10.1c Counter DRBG Expand

AES 2935

   First Validated: 8/11/2014
Operating Environment Algorithm Capabilities
Mentor Graphics Questa Simulator 10.1c AES-CBC Expand
Mentor Graphics Questa Simulator 10.1c AES-CTR Expand
Mentor Graphics Questa Simulator 10.1c AES-ECB Expand
Mentor Graphics Questa Simulator 10.1c AES-OFB Expand

Created October 05, 2016, Updated March 16, 2023