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The AES and SHA2 library running on the NXP implements the register and memory interface to the FPGA. The FPGA implements AES ECB, CBC and XTS as well as SHA224, 256, 384 and 512.
Version
FPGA Vendor Xilinx Part No. XC35500E Version: 2.0.0.2 03.00.0D (Firmware)
Type
FIRMWARE
Vendor
SPYRUS Inc. 1860 Hartog Drive San Jose, CA 95131-2203 USA
Contacts
William Sandberg-Maitland SMAITLAND@spyrus.com
408-392-9131
Fax: 408-392-0319
Jack Young jyoung@spyrus.com
408-392-9131
Fax: 408-392-0319