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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Hardware XTS-AES Encryption Engine
Description
This HDL AES algorithm implementation supports 128-bit and 256-bit key sizes in ECB mode and XTS mode.
Version
Git tag: XTS_AES_IP-v1.0.1-With_Cert_Tests
Type
FIRMWARE
Vendor
Western Digital Corporation
5601 Great Oaks Parkway
San Jose, CA 95119
USA
Contacts
Ishai Ilani
Ishai.Ilani@wdc.com
+972549222527
Danny Berler
Danny.Berler@wdc.com
+972545876034

C938

   First Validated: 7/25/2019
Operating Environment Algorithm Capabilities
Cadence Incisive Simulator version 17.10.001 Expand
    		AES-ECB Expand
    Cadence Incisive Simulator version 17.10.001 Expand
      		AES-XTS Expand
      Cadence Incisive Simulator version 17.10.001 Expand
        		AES-XTS Expand

        Created October 05, 2016, Updated March 16, 2023