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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
The AES-GCM LP IP Core is part of a suite of algorithms for FPGA or ASIC implementation provided by Beyond Semiconductor.
Version
BYSI-AES-GCM-LP
Type
HARDWARE
Vendor
Beyond Semiconductor
Brnciceva 41g
1231 Ljubljana-Crnuce, x x
Slovenia, EU
Contacts
Matjaz Breskvar
cavp@beyondsemi.com

C1437

   First Validated: 12/11/2019
Operating Environment Algorithm Capabilities
Beyond AES-GCM Low Power Expand
    AES-CTR Expand
    Beyond AES-GCM Low Power Expand
      AES-ECB Expand
      Beyond AES-GCM Low Power Expand
        AES-GCM Expand

        Created October 05, 2016, Updated March 16, 2023