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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
The TSIP-Lite is hardware which consists of firmware, cryptographic accelerator, random number generator and access management circuit along with chip-unique-ID.
Version
Version 1.11
Type
HARDWARE
Vendor
Renesas Electronics Corporation
5-20-1 Jousuihon-cho
Kodaira-shi, Tokyo 187-8588
Japan
Contacts
Hideyuki Tanaka
hideyuki.tanaka.jc@renesas.com
+81-42-312-6926
Fax: +81-42-328-4374

A987

   First Validated: 1/22/2021
Operating Environment Algorithm Capabilities
RX Family RX231 AES-CBC Expand
RX Family RX231 AES-CCM Expand
RX Family RX231 AES-CMAC Expand
RX Family RX231 AES-ECB Expand
RX Family RX231 AES-GCM Expand
RX Family RX231 AES-KW Expand
RX Family RX231 Counter DRBG Expand

Created October 05, 2016, Updated February 24, 2022