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Cryptographic Algorithm Validation Program CAVP

Description
AES-GCM, SHA3/384 and RSASP1 algorithms using XilSecure library and running on Zynq UltraScale+ MPSoC
Version
Zynq Ultrascale+ MPSoC PS VERSION:0x3
Type
HARDWARE
Vendor
Xilinx
2100 Logic Drive
San Jose, CA 95124
USA
Contacts
James Wesselkamper
jimwe@xilinx.com
(505) 798-6863

A1940

   First Validated: 9/22/2021
Operating Environment Algorithm Capabilities
Zynq UltraScale+ MPSoC Expand
    AES-GCM Expand
    Zynq UltraScale+ MPSoC Expand
      RSA Signature Primitive Expand
      Zynq UltraScale+ MPSoC Expand
        SHA3-384 Expand

        Created October 05, 2016, Updated March 08, 2021