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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
NXP's MDHA 2.5 is included in multiple i.MX, QorIQ and Layerscape processors including: LS1012A. It implements SHA-1, SHA-224, SHA-256, SHA-512, and HMAC.
Version
CAVP_MDHA_2.5_LS1012A (Firmware)
Type
SOFTWARE
Vendor
NXP Semiconductors
6501 William Cannon Drive West
Austin, TX 78735
USA
Contacts
Geoffery Waters
[email protected]
512-895-2069
Tom Tkacik
[email protected]
480-814-3299

HMAC 2515

   First Validated: 2/19/2016
Operating Environment Algorithm Capabilities
Cadence IES 15.10.009 Verilog simulator HMAC-SHA-1 Expand
Cadence IES 15.10.009 Verilog simulator HMAC-SHA2-224 Expand
Cadence IES 15.10.009 Verilog simulator HMAC-SHA2-256 Expand
Cadence IES 15.10.009 Verilog simulator HMAC-SHA2-384 Expand
Cadence IES 15.10.009 Verilog simulator HMAC-SHA2-512 Expand

SHS 3192

   First Validated: 2/19/2016
Operating Environment Algorithm Capabilities
Cadence IES 15.10.009 Verilog simulator SHA-1 Expand
Cadence IES 15.10.009 Verilog simulator SHA2-224 Expand
Cadence IES 15.10.009 Verilog simulator SHA2-256 Expand
Cadence IES 15.10.009 Verilog simulator SHA2-384 Expand
Cadence IES 15.10.009 Verilog simulator SHA2-512 Expand
Cadence IES 15.10.009 Verilog simulator SHA2-512/224 Expand
Cadence IES 15.10.009 Verilog simulator SHA2-512/256 Expand

Created October 05, 2016, Updated September 22, 2026