Official websites use .gov
A .gov website belongs to an official government organization in the United States.

Secure .gov websites use HTTPS
A lock ( ) or https:// means you’ve safely connected to the .gov website. Share sensitive information only on official, secure websites.

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
The S32 HSE AES Crypto Library is part of the Crypto Library v1.3.1, with HW IP version 1.32 running on the HSE subsystem on S32R41, SAF85xx, SAF86xx. The following cipher implementation is covered: AES The following cipher implementation is covered: AES.
Version
v1.3.1
Type
FIRMWARE
Vendor
NXP Semiconductors
60 High Tech Campus
Eindhoven, North Brabant 5656
Netherlands
[email protected]
Contacts
NXP Cybersecurity Certification Team
[email protected]
+31402729999

A5256

   First Validated: 4/18/2024
Operating Environment Algorithm Capabilities
ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
    AES-CBC Expand
    ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
      AES-CBC Expand
      ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
        AES-CBC Expand
        ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
          AES-CFB128 Expand
          ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
            AES-CFB128 Expand
            ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
              AES-CFB128 Expand
              ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                AES-CTR Expand
                ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                  AES-CTR Expand
                  ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                    AES-CTR Expand
                    ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                      AES-ECB Expand
                      ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                        AES-ECB Expand
                        ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                          AES-ECB Expand
                          ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                            AES-OFB Expand
                            ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                              AES-OFB Expand
                              ARM Cortex-M7 running on S32 HSE subsystem covering S32R41, SAF85xx, SAF86xx on ARM Cortex-M7 Expand
                                AES-OFB Expand

                                Created October 05, 2016, Updated September 22, 2026