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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Microcode in Crestmont (CMT) CPU core
Description
SHA256, SHA384 and HMAC-SHA256 algorithms are implemented in microcode, which is firmware for CPU core. Microcode implementation resides in ROM inside Crestmont CPU core.
Version
1.0
Type
FIRMWARE
Vendor
Intel Corporation
2200 Mission College Blvd.
Santa Clara, CA 95054-1549
USA
[email protected]
(408) 765-8080
Contacts
Intel FIPS Office
[email protected]
(408) 765-8080

A5367

   First Validated: 6/7/2024
Operating Environment Algorithm Capabilities
Intel® Efficient-core (E-core) Microcode Simulator Expand
    		HMAC-SHA2-256 Expand
    Intel® Efficient-core (E-core) Microcode Simulator Expand
      		SHA2-256 Expand
      Intel® Efficient-core (E-core) Microcode Simulator Expand
        		SHA2-384 Expand

        Created October 05, 2016, Updated September 22, 2026