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Cryptographic Algorithm Validation Program CAVP

Description
The DPSC is a HW block within the NVMe Protocol Engine that contains AES-XTS engines which support data rate encrypt and decrypt functions.
Version
2.4.0
Type
FIRMWARE
Vendor
Intel Corporation
2200 Mission College Blvd
Santa Clara, CA 95054
USA
Contacts
Manoj Maskara
[email protected]
(+1) 408-765-8080

A6041

   First Validated: 10/29/2024
Operating Environment Algorithm Capabilities
Synopsys VCS® (Verilog Compiler Simulator) Expand
    AES-ECB Expand
    Synopsys VCS® (Verilog Compiler Simulator) Expand
      AES-XTS Testing Revision 2.0 Expand

      Created October 05, 2016, Updated September 22, 2026