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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
A hardware-software co-design implementation of the ML-DSA algorithm in FPGA environments, supporting full key-pair generation, signature generation, and signature verification.
Version
1.0
Type
FIRMWARE
Vendor
Industrial Technology Research Institute (ITRI)
No. 195, Sec.4, Chung Hsing Rd., Chutung
Hsinchu, Taiwan 31040
R.O.C.
Contacts
Yichang Tsai
[email protected]
+886-2-2515-9665 #163

A7683

   First Validated: 11/14/2025
Operating Environment Algorithm Capabilities
AMD XC7A100T-1CSG324C Expand
    ML-DSA KeyGen Expand
    AMD Zynq UltraScale+ MPSoC ZU5EV Expand
      ML-DSA KeyGen Expand
      AMD XC7A100T-1CSG324C Expand
        ML-DSA SigGen Expand
        AMD Zynq UltraScale+ MPSoC ZU5EV Expand
          ML-DSA SigGen Expand
          AMD XC7A100T-1CSG324C Expand
            ML-DSA SigVer Expand
            AMD Zynq UltraScale+ MPSoC ZU5EV Expand
              ML-DSA SigVer Expand

              Created October 05, 2016, Updated September 22, 2026