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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
The ROM firmware within the XCVU095 FPGA that implements the bootloader in charge of decrypting and executing the firmware load test of the whole bitstream and HSM firmware
Version
1.1.4
Type
FIRMWARE
Vendor
Ranix Inc.
RANIX Bldg. 25, Eonju-ro 135-gil
Gangnam-gu, seoul, Region 06053
Korea
[email protected]
+82-2-584-5516 ext 224
Contacts
Je-Seok Yoon
[email protected]
+82-2-584-5516 (ext 224)
Fax: +82-2-584-5528

A8776

   First Validated: 7/16/2026
Operating Environment Algorithm Capabilities
ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
    AES-KW Expand
    ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
      ECDSA SigGen (FIPS186-5) Expand
      ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
        ECDSA SigVer (FIPS186-5) Expand
        ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
          HMAC-SHA2-224 Expand
          ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
            HMAC-SHA2-256 Expand
            ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
              HMAC-SHA2-384 Expand
              ROM Firmware module running on Arm SecurCore SC300 r0p1 32-bit RISC processor Expand
                HMAC-SHA2-512 Expand

                Created October 05, 2016, Updated September 22, 2026