Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
AESA 4.2
Description
Freescale's AESA 4.2 is included in multiple QorIQ Integrated Communications Processor, including: P4080r3 and P5040.
Version
CAVP_AESA_4.2
Type
HARDWARE
Vendor
NXP Semiconductor
6501 William Cannon West
Austin, TX 78735
USA
Contacts
Geoffrey Waters
Geoffrey.Waters@NXP.com
512-895-2069
Tom Tkacik
Tom.Tkacik@NXP.com
480-814-3299

AES 2491

   First Validated: 6/20/2013
Operating Environment Algorithm Capabilities
Chronologic VCS simulator, vcs D-2010.06-04 AES-CBC Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-CCM Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-CFB128 Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-CMAC Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-CTR Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-ECB Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-GCM Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-GMAC Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-OFB Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-XTS Expand
Chronologic VCS simulator, vcs D-2010.06-04 AES-XTS Expand

Created October 05, 2016, Updated April 03, 2025