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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
CLP-03
Description
Elliptic cryptographic algorithms implemented in Verilog RTL offer customers a wide range of configuration options for encryption, decryption and message authentication requirement. The AES core is build time configurable to optimize throughput versus gate count to meet the requirements for the target application.
Version
CLP-03
Type
HARDWARE
Vendor
Elliptic Semiconductor, Inc.
308 Legget Drive, Suite 202
Kanata, Ontario K2K 1Y6
Canada
Contacts
Patrick Offers
[email protected]
613-254-5456 x101
Fax: 613-254-7260
Neil Hamilton
[email protected]
613-254-5456 x108
Fax: 613-254-7260

AES 493

   First Validated: 1/24/2007
Operating Environment Algorithm Capabilities
N/A AES-CBC Expand
N/A AES-ECB Expand

Created October 05, 2016, Updated September 22, 2026