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Cryptographic Algorithm Validation Program CAVP

Description
The 50G AES-GCM Crypto IP is a full-featured implementation of the AES-GCM algorithms for IEEE 802.1AE Media Access Control Security (MACsec) specification, targeted for the Xilinx UltraScale and UltraScale+ FPGAs.
Version
50Gb/s AES-GCM (MACsec)
Type
HARDWARE
Vendor
Advanced Micro Devices (AMD)
2485 Augustine Drive
Santa Clara, CA 95054
USA
Contacts
FIPS Contact
FIPS@amd.com
+1 408-749-4000

AES 4847

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Xilinx 50Gb/s Ch AES-GCM Crypto IP for MACsec AES-ECB Expand
Xilinx 50Gb/s Ch AES-GCM Crypto IP for MACsec AES-GCM Expand
Xilinx 50Gb/s Ch AES-GCM Crypto IP for MACsec AES-GMAC Expand
Xilinx 50Gb/s Ch AES-GCM Crypto IP for MACsec AES-XPN Expand

Created October 05, 2016, Updated March 16, 2023