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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
AES_Cryptohw1_Tag_solar3
Description
This high-speed crytographic AES module is used in multiple Marvell SoC products, with throughput exceeding 6Gb/s, enabling in-line data encryption of user data across multiple high performance storage interfaces.
Version
01262009 (Firmware)
Type
SOFTWARE
Vendor
Marvell Semiconductor, Inc.
5488 Marvell Lane
Santa Clara, CA 95054
USA
Contacts
Lei Poo
408-222-5000

AES 1846

   First Validated: 10/31/2011
Operating Environment Algorithm Capabilities
Verilog Simulator VCS version C-2009.06-7 AES-CBC Expand
Verilog Simulator VCS version C-2009.06-7 AES-CTR Expand
Verilog Simulator VCS version C-2009.06-7 AES-ECB Expand
Verilog Simulator VCS version C-2009.06-7 AES-XTS Expand
Verilog Simulator VCS version C-2009.06-7 AES-XTS Expand

Created October 05, 2016, Updated September 22, 2026