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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
TSIP-Lite
Description
The TSIP-Lite is hardware which consists of firmware, cryptographic accelerator, random number generator and access management circuit along with chip-unique-ID.
Version
RX Family RX231 1.03 (Firmware)
Type
HARDWARE
Vendor
Renesas Electronics Corporation
5-20-1 Jousuihon-cho
Kodaira-shi, Tokyo 187-8588
Japan
Contacts
Hideyuki Tanaka
hideyuki.tanaka.jc@renesas.com
+81-42-312-6926
Fax: +81-42-328-4374

AES 4330

   First Validated: 1/13/2017
Operating Environment Algorithm Capabilities
TSIP-Lite AES-CBC Expand
TSIP-Lite AES-CMAC Expand
TSIP-Lite AES-ECB Expand
TSIP-Lite AES-GCM Expand
TSIP-Lite AES-GMAC Expand

Created October 05, 2016, Updated February 24, 2022