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Computer Security Resource Center

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    Projects Cryptographic Algorithm Validation Program Details

Cryptographic Algorithm Validation Program

Product Name
TSIP-Lite
Description
The TSIP-Lite is hardware which consists of firmware, cryptographic accelerator, random number generator and access management circuit along with chip-unique-ID.
Version
RX Family RX231 1.03 (Firmware)
Type
HARDWARE
Vendor
Renesas Electronics Corporation
5-20-1 Jousuihon-cho
Kodaira-shi, Tokyo 187-8588
Japan
Contacts
Hideyuki Tanaka
hideyuki.tanaka.jc@renesas.com
+81-42-312-6926
Fax: +81-42-328-4374

Validations

Number
Date
Operating Environments
Algorithm Capabilities
AES 4330
1/13/2017
  • TSIP-Lite
  • AES-CBC
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 256
  • AES-CMAC
      • Capabilities:
        • Direction: Generation, Verification
        • Key Length: 128
        • MAC: 16-128
        • Message Length: 0-296
        • Block Size: Full, Partial
      • Capabilities:
        • Direction: Generation, Verification
        • Key Length: 256
        • MAC: 16-128
        • Message Length: 0-384
        • Block Size: Full, Partial
  • AES-ECB
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 256
  • AES-GCM
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 256
    • Tag Length: 32, 64, 96, 104, 112, 120, 128
    • IV Length: 96
    • Payload Length: 104, 128, 256, 408
    • AAD Length: 0, 128, 160, 384, 720
  • AES-GMAC
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 256
    • Tag Length: 32, 64, 96, 104, 112, 120, 128
    • IV Length: 96
    • AAD Length: 0, 128, 160, 384, 720