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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
AES Module
Description
Microsemi's AES reusable IP core for ASICs and FPGAs supports all key lengths, NIST recommended block modes, encryption and/or decryption, and configurable size/throughput optimization settings. This core is developed by cleared US citizens for Government/Defense systems.
Version
4.4 (Firmware)
Type
SOFTWARE
Vendor
Microsemi Corporation
1281 Win Hentschel Blvd
West Lafayette, IN 47906
USA
Contacts
Michael Mehlberg
[email protected]
(571) 319-3343
Fax: (765) 775-1038
General Inquiries
[email protected]
(765) 775-1004
Fax: (765) 775-1038

AES 2389

   First Validated: 4/23/2013
Operating Environment Algorithm Capabilities
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-CBC Expand
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-CFB1 Expand
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-CFB128 Expand
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-CFB8 Expand
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-CTR Expand
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-ECB Expand
Mentor Graphics Modelsim PE 6.6 Revision: 2010.01 AES-OFB Expand

Created October 05, 2016, Updated September 22, 2026