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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Encryption/Decryption Device (EDD)
Description
This implemenation involves the AES-256 Encryption and Decryption using the CTR wrapper, a 256-bit encryption key, and a 32-bit Initial Vector (IV). The implemenation firmware has been licensed from Helion Technologies Ltd. as their Fast AES core.
Version
1.0 (Firmware)
Type
SOFTWARE
Vendor
Systems&Processes Engineering Corporation ("SPEC")
6800 Burleson Rd
Bldg. 320
Austin, Texas 78744
USA
Contacts
Rich Wise
[email protected]
512 691-8182
Fax: 512 494-0756
Joe Priest
[email protected]
512 691-8165
Fax: 512 494-0756

AES 787

   First Validated: 5/22/2008
Operating Environment Algorithm Capabilities
Xilinx XC4VLX40-11FFG1142 FPGA AES-CTR Expand
Xilinx XC4VLX40-11FFG1142 FPGA AES-ECB Expand

Created October 05, 2016, Updated April 03, 2025