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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
JMICRON_AES
Description
JMICRON_AES is a synthesizable IP core which implements encryption and decryption functions of AES defined in FIPS 197. It's used in JMicron's products.
Version
v1.1.0 (Firmware)
Type
SOFTWARE
Vendor
JMicron Technology Corp.
IF, No.13, Innovation Road 1,
Hsinchu Science Park
Hsinchu, 300 Taiwan
R.O.C.
Contacts
James Chang
[email protected]
886-3-5797389 x 8305
Fax: 886-3-5799566
Stan Lin
[email protected]
886-3-5797389 x8038
Fax: 886-3-5799566

AES 1551

   First Validated: 1/6/2011
Operating Environment Algorithm Capabilities
Cadence NC-Verilog Simulator AES-CBC Expand
Cadence NC-Verilog Simulator AES-ECB Expand
Cadence NC-Verilog Simulator AES-XTS Expand
Cadence NC-Verilog Simulator AES-XTS Expand

Created October 05, 2016, Updated September 22, 2026