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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
JetAES-Standard IP core
Description
The Jetstream Standard AES engine is a reusable silicon IP core for use in ASIC and FPGA, designed for medium speed and area, and capable of supporting all three AES key sizes and any commonly used block cipher mode. It includes key expansion.
Version
2.0 (Firmware)
Type
SOFTWARE
Vendor
Jetstream Media Technologies Corporation
800 W. 5th Ave.,
Suite 201E
Naperville, IL 60563
USA
Contacts
Philip Chao
[email protected]
630-886-4363
Fax: 630-357-5750

AES 538

   First Validated: 4/30/2007
Operating Environment Algorithm Capabilities
Xilinx XC2V2000 FPGA AES-ECB Expand

Created October 05, 2016, Updated September 22, 2026