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Cryptographic Algorithm Validation Program CAVP

Implementation Name
A compact yet high-performance PKCS #1 v 1.5 / RSA-2048 / SHA-256 software implementation targeting safe boot applications. Provided as a library for Bare-metal BSP and implemented in the Xilinx SDK FSBL for the Xilinx Zynq®-7000 All Programmable SoCs. Includes RSA key generation, signature generation and signature verification. RSAVS test bench.
1.6 (MD5 checksum bd4250ea4cc2f5af1b41fca05d97339d) (Firmware)
IP Cores, Inc.
3731 Middlefield Road
Palo Alto, CA 94303
Dmitri Varsanofiev
(650) 815-7996

RSA 1481

   First Validated: 5/9/2014
Operating Environment Algorithm Capabilities
Xilinx Zynq®-7000 ARM Cortex-A9 RSA SigGen (FIPS186-4) Expand
Xilinx Zynq®-7000 ARM Cortex-A9 RSA SigVer (FIPS186-4) Expand

Created October 05, 2016, Updated March 16, 2023