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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
AES_CoProcessors
Description
AES Component implement AES-256 ECB mode. Uses PL AES ECB CoProcessor FPGA.
Version
Xilinx Zynq SOC FPGA Version 2.1.0.0 2.1.0.0
Type
HARDWARE
Vendor
Viasat, Inc.
6155 El Camino Real
Carlsbad, CA 92009
USA
Contacts
Kamran Ahmad
Kamran.Ahmad@viasat.com
7608931811
Mike Blakely
Mike.Blakely@viasat.com
760-476-2245

C545

   First Validated: 3/12/2019
Operating Environment Algorithm Capabilities
Xilinx XC7Z030 ZYNQ ARM Cortex A9 Processor Subsystem Expand
    		AES-CBC Expand
    Xilinx XC7Z030 ZYNQ ARM Cortex A9 Processor Subsystem Expand
      		AES-ECB Expand

      Created October 05, 2016, Updated March 07, 2024