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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Zynq Ultrascale+ MPSoC XilSecure Library
Description
RSASP1 algorithm using XilSecure library and running on Zynq UltraScale+ MPSoC
Version
5.3
Type
HARDWARE
Vendor
Advanced Micro Devices (AMD)
2485 Augustine Drive
Santa Clara, CA 95054
USA
Contacts
FIPS Contact
FIPS@amd.com
+1 408-749-4000

A4878

   First Validated: 12/21/2023
Operating Environment Algorithm Capabilities
Zynq Ultrascale+ MPSoC Expand
    		RSA Signature Primitive Expand

    Created October 05, 2016, Updated March 16, 2023