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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Primus HSM RSA FPGA implementation
Description
RSA implementation in FPGA in an embedded environment.
Version
2.0.0
Type
HARDWARE
Vendor
Securosys SA
Max-Högger-Strasse 2
Zurich, Zurich 8048
Switzerland
Contacts
Marcel Dasen
[email protected]
+41 44 552 31 33
Andreas Curiger
[email protected]
+41 44 552 31 30

A5709

   First Validated: 9/4/2024
Operating Environment Algorithm Capabilities
AMD Xilinx Series-7 Kintex Expand
    		RSA KeyGen (FIPS186-5) Expand
    AMD Xilinx Series-7 Kintex Expand
      		RSA KeyGen (FIPS186-5) Expand
      AMD Xilinx UltraScale Kintex Expand
        		RSA KeyGen (FIPS186-5) Expand
        AMD Xilinx UltraScale Kintex Expand
          		RSA KeyGen (FIPS186-5) Expand
          AMD Xilinx Series-7 Kintex Expand
            		RSA SigGen (FIPS186-5) Expand
            AMD Xilinx UltraScale Kintex Expand
              		RSA SigGen (FIPS186-5) Expand
              AMD Xilinx Series-7 Kintex Expand
                		RSA Signature Primitive 2.0 Expand
                AMD Xilinx Series-7 Kintex Expand
                  		RSA Signature Primitive 2.0 Expand
                  AMD Xilinx UltraScale Kintex Expand
                    		RSA Signature Primitive 2.0 Expand
                    AMD Xilinx UltraScale Kintex Expand
                      		RSA Signature Primitive 2.0 Expand
                      AMD Xilinx Series-7 Kintex Expand
                        		RSA SigVer (FIPS186-5) Expand
                        AMD Xilinx Series-7 Kintex Expand
                          		RSA SigVer (FIPS186-5) Expand
                          AMD Xilinx UltraScale Kintex Expand
                            		RSA SigVer (FIPS186-5) Expand
                            AMD Xilinx UltraScale Kintex Expand
                              		RSA SigVer (FIPS186-5) Expand

                              Created October 05, 2016, Updated April 03, 2025