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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
CFU_AES
Description
Verilog module implementing algorithms (AES-ECB, CBC, CTR, CMAC-AES, GCM, GMAC, CMAC-AES based counter KDF).
Version
5.1
Type
FIRMWARE
Vendor
Intel Corporation
2200 Mission College Blvd
Santa Clara, CA 95054
USA
Contacts
Manoj Maskara
[email protected]
(+1) 408-765-8080

A6214

   First Validated: 11/19/2024
Operating Environment Algorithm Capabilities
Synopsys VCS® (Verilog Compiler Simulator) Expand
    		AES-CBC Expand
    Synopsys VCS® (Verilog Compiler Simulator) Expand
      		AES-CMAC Expand
      Synopsys VCS® (Verilog Compiler Simulator) Expand
        		AES-CTR Expand
        Synopsys VCS® (Verilog Compiler Simulator) Expand
          		AES-ECB Expand
          Synopsys VCS® (Verilog Compiler Simulator) Expand
            		AES-GCM Expand
            Synopsys VCS® (Verilog Compiler Simulator) Expand
              		AES-GMAC Expand
              Synopsys VCS® (Verilog Compiler Simulator) Expand
                		KDF SP800-108 Expand

                Created October 05, 2016, Updated September 22, 2026