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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
Verilog module implementing HMAC-SHA2 algorithms.
Version
5.1
Type
FIRMWARE
Vendor
Intel Corporation
2200 Mission College Blvd
Santa Clara, CA 95054
USA
Contacts
Manoj Maskara
[email protected]
(+1) 408-765-8080

A6228

   First Validated: 11/19/2024
Operating Environment Algorithm Capabilities
Synopsys VCS® (Verilog Compiler Simulator) Expand
    HMAC-SHA2-224 Expand
    Synopsys VCS® (Verilog Compiler Simulator) Expand
      HMAC-SHA2-256 Expand
      Synopsys VCS® (Verilog Compiler Simulator) Expand
        HMAC-SHA2-384 Expand
        Synopsys VCS® (Verilog Compiler Simulator) Expand
          HMAC-SHA2-512 Expand
          Synopsys VCS® (Verilog Compiler Simulator) Expand
            HMAC-SHA2-512/224 Expand
            Synopsys VCS® (Verilog Compiler Simulator) Expand
              HMAC-SHA2-512/256 Expand
              Synopsys VCS® (Verilog Compiler Simulator) Expand
                HMAC-SHA3-256 Expand
                Synopsys VCS® (Verilog Compiler Simulator) Expand
                  HMAC-SHA3-384 Expand
                  Synopsys VCS® (Verilog Compiler Simulator) Expand
                    HMAC-SHA3-512 Expand

                    Created October 05, 2016, Updated September 22, 2026