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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Zynq Ultrascale+ MPSoC XilSecure Library
Description
RSASP1 algorithm using XilSecure library and running on Zynq UltraScale+ MPSoC
Version
5.5
Type
HARDWARE
Vendor
Advanced Micro Devices (AMD)
2485 Augustine Drive
Santa Clara, CA 95054
USA
Contacts
FIPS Contact
[email protected]
+1 408-749-4000

A6939

   First Validated: 5/21/2025
Operating Environment Algorithm Capabilities
Zynq Ultrascale+ MPSoC Expand
    		RSA Signature Primitive 2.0 Expand
    Zynq Ultrascale+ MPSoC Expand
      		RSA SigVer (FIPS186-5) Expand

      Created October 05, 2016, Updated April 03, 2025