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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
RW61x DRBG_CTR_AES Crypto Library v1.9.0. Hardware implementation (ELS_DRBG_CTR_AES)
Description
The RW61x Crypto Library is part of the RW61x family with EdgeLock Secure Enclave (Core Profile) version 2.16.2 and EdgeLock Secure Enclave (Core Profile) Microcode version 1.02.1. The following cipher implementation is covered: ELS_DRBG_CTR_AES.
Version
v1.9.0
Type
HARDWARE
Vendor
NXP Semiconductors
60 High Tech Campus
Eindhoven, North Brabant 5656
Netherlands
[email protected]
Contacts
NXP Cybersecurity Certification Team
[email protected]
+31402729999

A7086

   First Validated: 6/30/2025
Operating Environment Algorithm Capabilities
NXP Semiconductors Arm Cortex M Arm Cortex M33 on RW61x Expand
    		Counter DRBG Expand

    Created October 05, 2016, Updated September 22, 2026