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Cryptographic Algorithm Validation Program CAVP

Implementation Name
Description
Verilog module implementing SigVer and SigGen algorithms for EcDSA
Version
5.0
Type
FIRMWARE
Vendor
Intel Corporation
2200 Mission College Blvd.
Santa Clara, CA 95054-1549
USA
[email protected]
(408) 765-8080
Contacts
Intel FIPS Office
[email protected]
(408) 765-8080

A7995

   First Validated: 2/3/2026
Operating Environment Algorithm Capabilities
Synopsys VCS® (Verilog Compiler Simulator) Expand
    ECDSA SigGen (FIPS186-5) Expand
    Synopsys VCS® (Verilog Compiler Simulator) Expand
      ECDSA SigVer (FIPS186-5) Expand

      Created October 05, 2016, Updated September 22, 2026