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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
DRBG Hardware Block
Description
XCVU095 FPGA DRBG block implemented in RTL within the programmable logic that provides FIPS140-3 compliant Counter DRBG
Version
0x4007
Type
HARDWARE
Vendor
Ranix Inc.
RANIX Bldg. 25, Eonju-ro 135-gil
Gangnam-gu, seoul, Region 06053
Korea
[email protected]
+82-2-584-5516 ext 224
Contacts
Je-Seok Yoon
[email protected]
+82-2-584-5516 (ext 224)
Fax: +82-2-584-5528

A8774

   First Validated: 7/16/2026
Operating Environment Algorithm Capabilities
DRBG Hardware Block Expand
    		AES-ECB Expand
    DRBG Hardware Block Expand
      		Counter DRBG Expand

      Created October 05, 2016, Updated September 22, 2026