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Cryptographic Algorithm Validation Program CAVP

Description
The FiberLogic Hardware Cryptographic Module provides FIPS 140-3 validated cryptographic functionality.
Version
SDR_FIPS_Hardware_v1.0
Type
HARDWARE
Vendor
Fiber Logic Communications, Inc.
5F-3, No.9, Prosperity Road One
Hsinchu Science Park, Hsinchu City 300
Taiwan
Contacts
Swason Wang
[email protected]
+886-3-5638889

A8942

   First Validated: 9/15/2026
Operating Environment Algorithm Capabilities
AMD Zynq Ultrascale+ MPSoC Expand
    AES-CBC Expand
    AMD Zynq Ultrascale+ MPSoC Expand
      AES-ECB Expand
      AMD Zynq Ultrascale+ MPSoC Expand
        AES-GCM Expand
        AMD Zynq Ultrascale+ MPSoC Expand
          AES-GMAC Expand

          Created October 05, 2016, Updated September 22, 2026