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Cryptographic Algorithm Validation Program CAVP

Description
The CrossBar Daric PQC Cryptographic Library is deployed on the Daric security chip, implementing ML-DSA (FIPS 204) and ML-KEM (FIPS 203) algorithms. Core cryptographic computations utilize the dedicated hardware crypto engine, while certain PQC-specific operations are implemented in firmware. The library supports execution on both ARM Cortex-M7 and RISC-V processor cores.
Version
V1.0.0
Type
HARDWARE
Vendor
Crossbar, Inc.
2055 Laurelwood Road
STE 230
Santa Clara, CA 95054
USA
Contacts
Sherman Wan
[email protected]
+1 (408) 884-0281, Ext. 540

A9051

   First Validated: 9/28/2026
Operating Environment Algorithm Capabilities
CrossBar Daric Security Chip – Arm Cortex M7 Expand
    ML-DSA KeyGen Expand
    CrossBar Daric Security Chip – RISC V Core Expand
      ML-DSA KeyGen Expand
      CrossBar Daric Security Chip – Arm Cortex M7 Expand
        ML-DSA SigGen (FIPS204-tr1) Expand
        CrossBar Daric Security Chip – RISC V Core Expand
          ML-DSA SigGen (FIPS204-tr1) Expand
          CrossBar Daric Security Chip – Arm Cortex M7 Expand
            ML-DSA SigVer Expand
            CrossBar Daric Security Chip – RISC V Core Expand
              ML-DSA SigVer Expand
              CrossBar Daric Security Chip – Arm Cortex M7 Expand
                ML-KEM EncapDecap (FIPS203-tr1) Expand
                CrossBar Daric Security Chip – RISC V Core Expand
                  ML-KEM EncapDecap (FIPS203-tr1) Expand
                  CrossBar Daric Security Chip – Arm Cortex M7 Expand
                    ML-KEM KeyGen Expand
                    CrossBar Daric Security Chip – RISC V Core Expand
                      ML-KEM KeyGen Expand

                      Created October 05, 2016, Updated September 22, 2026