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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Shure AES FPGA Core
Description
Shure AES reusable IP core for ASICs and FPGAs supports encryption and decryption using 128, 192 and 256-bit AES keys. It provides cryptographic services in Shure wired/wireless digital audio products.
Version
1.0 (Firmware)
Type
SOFTWARE
Vendor
Shure Inc.
5800 W Touhy Ave
Niles, IL 60714
USA
Contacts
Mr. Chris Frantisak
[email protected]
847-600-8995

AES 2552

   First Validated: 7/5/2013
Operating Environment Algorithm Capabilities
Modelsim PE 10.1d AES-CTR Expand
Modelsim PE 10.1d AES-ECB Expand

Created October 05, 2016, Updated September 22, 2026