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Cryptographic Algorithm Validation Program CAVP

Description
Hashing Core IP module performs SHA-1 and MD-5, also incorporated in Tality IPSec Coprocessor. Suitable for IPSec HMAC and Digital Signature Standard Random Number Generation. Fully synchronous streaming bus interface. 75MHz operation at 0.25um.
Version
T-CS-EN-0003-100
Type
HARDWARE
Vendor
Cadence Design Systems, Inc.
1 The Alba Campus
Livingston, West Lothian EH54 7HH
Scotland, UK
Contacts
Mark Lewis
[email protected]
+44 1506 595083
Fax: +44 1506 595959

SHS 74

   First Validated: 12/3/2001
Operating Environment Algorithm Capabilities
N/A SHA-1 Expand

Created October 05, 2016, Updated September 22, 2026