Published: November 5, 2024
Author(s)
Dipal Halder (University of Florida), Yuntao Liu (University of Maryland), Kostas Amberiadis (NIST), Ankur Srivastava (University of Maryland), Sandip Ray (University of Florida)
Conference
Name: 2024 IEEE 37th International System-on-Chip Conference
Dates: 09/16/2024 - 09/19/2024
Location: Dresden, Germany
Citation: 2024 IEEE 37th International System-on-Chip Conference (SOCC), pp. 1-6
We develop a novel post-synthesis obfuscation technique, PoTeNt, to protect NoC fabrics against reverse engineering attacks. PoTeNt integrates programmable switches at NoC routers, concealing topology and communication paths under a dynamically controlled key to make the design resilient to reverse-engineering attempts. By targeting post-synthesis gate-level netlist, PoTeNt overcomes challenges induced by logic optimization that can render pre-synthesis (RTL-level) NoC obfuscations vulnerable to SAT attacks. We extensively evaluate PoTeNt to demonstrate its robustness to SAT attacks. Finally, our experiments show that PoTeNt incurs minimal overhead on area, power, and performance.
We develop a novel post-synthesis obfuscation technique, PoTeNt, to protect NoC fabrics against reverse engineering attacks. PoTeNt integrates programmable switches at NoC routers, concealing topology and communication paths under a dynamically controlled key to make the design resilient to...
See full abstract
We develop a novel post-synthesis obfuscation technique, PoTeNt, to protect NoC fabrics against reverse engineering attacks. PoTeNt integrates programmable switches at NoC routers, concealing topology and communication paths under a dynamically controlled key to make the design resilient to reverse-engineering attempts. By targeting post-synthesis gate-level netlist, PoTeNt overcomes challenges induced by logic optimization that can render pre-synthesis (RTL-level) NoC obfuscations vulnerable to SAT attacks. We extensively evaluate PoTeNt to demonstrate its robustness to SAT attacks. Finally, our experiments show that PoTeNt incurs minimal overhead on area, power, and performance.
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Keywords
Network-on-Chip (NoC); System-on-Chip (SoC); Post-synthesis obfuscation; Reverse engineering attacks
Control Families
None selected
