Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Zynq Ultrascale+ MPSoC XilSecure Library, v2022.2
Description
AES-GCM, SHA3/384 and RSASP1 algorithms using XilSecure library and running on Zynq UltraScale+ MPSoC
Version
2022.2
Type
HARDWARE
Vendor
Advanced Micro Devices (AMD)
2485 Augustine Drive
Santa Clara, CA 95054
USA
Contacts
FIPS Contact
FIPS@amd.com
+1 408-749-4000

A4091

   First Validated: 6/27/2023
Operating Environment Algorithm Capabilities
Zynq Ultrascale+ MPSoC Expand
    		AES-GCM Expand
    Zynq Ultrascale+ MPSoC Expand
      		RSA Signature Primitive Expand
      Zynq Ultrascale+ MPSoC Expand
        		SHA3-384 Expand

        Created October 05, 2016, Updated April 03, 2025