Computer Security Resource Center

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Cryptographic Algorithm Validation Program

Description
The 100G AES-GCM Crypto IP is a full-featured implementation of the AES-GCM algorithms for IEEE 802.1AE Media Access Control Security (MACsec) specification, targeted for the Xilinx UltraScale and UltraScale+ FPGAs.
Version
100Gb/s AES-GCM (MACsec) v1.0 (Firmware)
Type
FIRMWARE
Vendor
Xilinx, Inc.
2100 Logic Drive
San Jose, CA 95124
USA
Contacts
Ravi Sunkavalli
rsunkav@xilinx.com
(408) 879-3557

Validations

Number
Date
Operating Environments
Algorithm Capabilities
AES 3953
4/29/2016
  • Cadence IUS 14.10.018 Verilog Simulator
  • AES-ECB
    • Direction: Encrypt
    • Key Length: 128, 256
  • AES-GCM
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 256
    • Tag Length: 128
    • IV Length: 96
    • Payload Length: 8, 128, 32760, 32768
    • AAD Length: 8, 128, 32760, 32768
  • AES-GMAC
    • Direction: Decrypt, Encrypt
    • Key Length: 128, 256
    • Tag Length: 128
    • IV Length: 96
    • AAD Length: 8, 128, 32760, 32768