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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
Xilinx 100Gb/s AES-GCM Crypto IP for MACsec
Description
The 100G AES-GCM Crypto IP is a full-featured implementation of the AES-GCM algorithms for IEEE 802.1AE Media Access Control Security (MACsec) Specification, targeted for the Xilinx UltraScale and UltraScale+ FPGAs.
Version
100Gb/s AES-GCM (MACsec)
Type
HARDWARE
Vendor
Advanced Micro Devices (AMD)
2485 Augustine Drive
Santa Clara, CA 95054
USA
Contacts
FIPS Contact
FIPS@amd.com
+1 408-749-4000

AES 4804

   First Validated: 10/13/2017
Operating Environment Algorithm Capabilities
Xilinx 100Gb/s AES-GCM Crypto IP for MACsec AES-ECB Expand
Xilinx 100Gb/s AES-GCM Crypto IP for MACsec AES-GCM Expand
Xilinx 100Gb/s AES-GCM Crypto IP for MACsec AES-GMAC Expand
Xilinx 100Gb/s AES-GCM Crypto IP for MACsec AES-XPN Expand

Created October 05, 2016, Updated August 08, 2024